IIT Guwahati researchers make breakthrough in memory architectures

NEW DELHI: Indian Institute of Technology Guwahati researchers have made contributions to memory architectures by preventing redundancy in data values and improving slow and frequent writes in the multi-core processor systems.

When the world is rapidly moving towards research in applied areas, IIT Guwahati researchers have developed methods to solve the problems in computer systems domain, as per a statement from IIT Guwahati.

Hemangee K Kapoor, department of CSE, IIT Guwahati is leading the research and while explaining the challenges, she said, “The application data access patterns are not uniformly distributed and hence leads to several orders of writes to certain memory locations compared to others. Such heavily written locations become prone to wear-out and thus prevents the use of complete memory devices without error corrections”.

“The team is also working on extending them to off-chip main memory. The future challenges are to handle lifetime enhancement in presence of encryption methods used to secure the Non-volatile memory and to handle temperature and process technology driven disturbance errors introduced when the cells are read or written,” she added.

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To handle this non-uniformity, IIT Guwahati researchers have built methods to evenly distribute the accesses across the overall memory capacity to reduce the wear-out pressure on heavily written locations, the IIT Guwahati statement added.

The researcher’s current and future contributions will help overcome the drawbacks of promising emerging memories and ease their adaptability. Once some drawbacks are easily removed, scientists can find newer avenues for using such technologies without worrying about its limitations, the statement further said.

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